Experience verifying complex IP/ASIC both at Module level and SoC Level. VMM/OVM/UVM Methodology
knowledge/experience is required knowledge.
Experience in OCP open core protocol is mandatory.
Excellent Hands-On debugging skills. Experience on Industry Standard simulation tools.
Proficient in using modern constrained-random verification techniques like System Verilog, VMM/ UVM/O VM, Perl, Tcl, UNIX shell scripting. Experience with simulators, debug tools, and commercial verification IP.
Ability to communicate effectively with multiple global cross-functional teams.
Should have good communication skills and the ability and desire to foster a team environment.