VLSI Verification Engineer - Verilog/c/c++

  • Bangalore
  • 10-15 lakh
  • 3-8 years
  • 27 May 2016

  • IT/ Information Technology

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

- BS or MS degree, major in CSIE or EE/EC is preferred.

- 410+ year+ experiences.

- Good understanding and coding skill in SystemVerilog, Verilog and also C/C++.

- Familiar with ARM based architecture from system architecture, instruction set, and also memory subsystem and cache architecture.

- Experience in developing assertion based coverage driven constraint random verification methodologies eg UVM/VMM//OVM etc.

- Experience in SoC verification of different modules of connectivity combo chips.

- Experience in developing Perl script for regression configuration control and RTL/post simulation analysis

- Experience in developing the system test environment for whole chip verification in connectivity projects.

- Experience in developing the full chip verification test plan and automation script on connectivity projects

- Low power verification using UPF/CPF, CLP, MVRC or NLP

Competencies/Skill sets for this job

C/c++ Verification Systemverilog Perl Chip Verification Projects

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