Sr. Physical Design Manager

CONNECTPRO MANAGEMENT CONSULTANTS PVT LTD
  • Pune
  • 10-20 lakh
  • 15-20 years
  • 69 Views
  • 29 May 2015
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  • IT/ Information Technology

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

Lead and manage a team of highly skilled and motivated engineers with expertise ranging from Synthesis, DFT, Layout, Timing Closure, Physical verification, etc
- Own and execute state of the art, multi-million, multi-power-island, very large area chip in 40, 45, and 28 nm technologies
- Scale the team for multiple parallel developments.

Requirements/Qualifications (Education) : - Ability to build, and train the team to execute multi-million gates, state of the art SoC
- Complete understanding of Synthesis to Tape-out flow, including Layout, DFT, Timing Closure, and Chip Finishing
- Managed at least 3 end to end projects those spanned across entire life cycle of development
- Ability to communicate with RTL design, marketing, and remote teams
- Excellent verbal and written communication skills
- Expertise on 40, 45, and 28 nm technologies
- Expertise on either Cadence or Synopsys flow
- Minimum 15 years of relevant experience.


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