ASIC SOC Design Engineer Staff

  • Bangalore
  • 10-15 lakh
  • 8-13 years
  • 24 Jun 2015

  • IT/ Information Technology

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

Masters in Engineering/ Bachelors in Engineering from a reputed institute (Tier 1 or Tier2 Colleges) with good academic record (min 70%)Experience:8 - 14 years of experience in SoC / ASIC design External Job Description : Job profile: Architecture, design and RTL coding of Block level and chip level RTL development Worked on complex data path designs and/ IP development Participate in DFT insertion and integration of SoCs.DFT audits and sign off Participate in synthesis and timing analysis Required knowledge and skills:VLSI Design flows Logic and Circuit design Expertise in Verilog Synthesis and timing analysis DFT insertion in multi clock, rail and high speed designs. Expertise in DFT methodology, flow and tools Test vector generation and ATE test vector debug Good communication skills outstanding analytical and critical thinking skills. Desirable Skills: Worked on complex data path designs and/ IPs Knowledge of power analysis tools Expertise in scripting languages Knowledge of DFT Tetramax tool

Competencies/Skill sets for this job

Rtl Rtl Coding Dft Soc Synthesis Scripting

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