Synthesis / STA Engineer

Brainsearch Consulting
  • Delhi, Hyderabad, Mumbai, Pune
  • Confidential
  • 3-8 years
  • 190 Views
  • 02 Jul 2015
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  • IT/ Information Technology

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

Minimum 3 yrs working exp with top/block level timing closure (STA), timing closure methodologies. Good exp in EDA tools : PrimeTime, Deep Sub Micron topics, clock tree designs & CCD. Well versed with tcl / Perl script.


Competencies/Skill sets for this job

Synthesis Sta Designs Rtl Dft Cts

Job Posted By

Mandeep M
Account Manager

About Organisation

Brainsearch Consulting