ASIC UVM Experts

Roland & Associates
  • Bangalore
  • 25-40 lakh
  • 10-15 years
  • 98 Views
  • 31 Dec 2015
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  • IT/ Information Technology

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

Must have in ASIC Verification.
Language: SystemVerilog (SV), SVA (System Verilog Assertions)
Verification Methodology: UVM
Protocol: AMBA/APB/AHB/AXI/AXI4/ACE/CCIan


Competencies/Skill sets for this job

Uvm Verification Systemverilog Asic System Verilog

Job Posted By

About Organisation

Roland & Associates