Qualification: PhD/MS/ME/MTech/ B.E / B. Tech
Skills Required :
2 to 10+ year of experiences on digital design (Architecture, RTL coding, Integration, Synthesis, LEC, STA , DFT, Low power, FPGA)
Good understanding of SoC Architecture.
Good understanding and hangs on experience of Protocols such as AMBA AXI, AHB, APB, OCP, LPDDR2.
Good understanding and coding skill in Verilog, Perl and TCL
Strong knowledge of ASIC / FPGA design methodology and should be well versed in front-end design, simulation, and synthesis tools