ASIC Verification Professional-system Verilog/ovm

Allegro Solutions
  • Ahmedabad
  • 10-15 lakh
  • 4-9 years
  • 12 Mar 2015

  • IT/ Information Technology

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

Detailed Description of the Job Profile:

- He should have experience of front end ASIC Verification flow. Should have experience in leading module level
verification independently performing RTL and gate level verifications of SoC and design IPs.

- Should have through knowledge of verification requirements of processor based SoC.

- Should have expertise in SystemVerilog/Specman, OVM/VMM, Verilog and C/C++. Should have experience in a multi-site environment, interacting with teams in other sites.

Minimum 4+ years experience in SV and UVM / OVM / VMM based ASIC / FPGA verification.

- Coverage driven verification skill is a must.

- He should be very well versed with architecting test benches and should have done at least 2 SOC verification projects in SV/ UVM.

Following are the skills required:

- Design Languages: Verilog, VHDL (must)

- Scripting: shell, Perl (good to have

- General Purpose languages: C, C++. (good to have)

Qualification: BE/B.Tech/ME/M.Tech

Competencies/Skill sets for this job

Verification Systemverilog Specman Asic Verilog Ovm C++

Job Posted By

About Organisation

Allegro Solutions