Senior Engineer/ Lead Engineer - Verification

Sasken Communication Technologies Ltd
  • Bangalore
  • Confidential
  • 4-9 years
  • 13 Mar 2015

  • Project/ Program Management IT

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor, IT/ Technology - Embedded
Job Description

Hands on experience of SoC verification using any one of the standard methodologies.
Specman/eRM/UVM/System Verilog.
Should have worked in defining the TB from scratch and have involved in developing the environment .
Have lead at least 3 tape outs experience

Competencies/Skill sets for this job

Verification Uvm Soc Verification System Verilog Verilog Specman Scratch

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