Senior Design Engineer - IO Design

CONNECTPRO MANAGEMENT CONSULTANTS PVT LTD
  • Bangalore
  • 10-15 lakh
  • 4-9 years
  • 123 Views
  • 10 Jul 2015
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  • IT/ Information Technology

  • IT/ Technology - Software/ Services
Job Description

The IO engineer will be responsible for development of our popular General Purpose I/O libraries. The I/O engineer will be part of an enthusiastic bright team to optimize schematics, work with layout designers for optimal layout, characterize these I/Os, generate and verify a wide variety of views for industry standard EDA tools.

Accountabilities / Responsibilities:

- Design and deliver General Purpose I/O libraries in various process technologies.

- Work with design experts in I/O interfaces, including solutions for ESD and Latch-up at deep sub-micron technologies.

- Work with layout/mask designers to effectively instruct them to deliver high quality of layout.

- Circuit simulations to validate specification of various I/O libraries, using SPICE like simulator

- Verification of functionality, performance and power for all I/O cells developed.

- Characterization of the I/O library.

- Delivering high quality I/O library EDA views to customers.

- Work with IC manufactures to understand leading edge CMOS technologies.

- Work with ARM Design Automation group to continually define, improve and develop infrastructure and methodologies for improving quality and efficiency.

- Work with key technical staff within the division as well as other divisions within ARM

Personal Requirements:
- Graduate from a Reputed College or Institution
- BS in Electrical Engineering / Computer Science or Equivalent degree

Essential Technical Skills:

- Minimum of 4+ years in design and delivery of IO libraries/products.
- Circuit design experience in design and delivery of General Purpose I/O libraries.
- Clear understanding of power, performance and area trade-offs
- Clear knowledge of layout at transistor level, specifically taking care of EM, power delivery and noise effects
- Basic knowledge of ESD protection techniques
- Circuit experience and technology tradeoffs in deep submicron technologies (90nm or smaller)
- Experience with circuit level simulators, Schematics and Layout capture tools.
- Experience with backend verification tools for DRC, LVS
- Experience in scripting languages, like PERL, Tcl etc.

Desirable Skills:

- Knowledge of implementing low-power solutions at SoC level, using industry standard low power models
- Knowledge of Verilog language and Verilog simulators.
- Exposure to IBIS models.
- Knowledge of High speed I/O Interfaces like DDR, LVDS
- Knowledge of Signal Integrity analysis

Personal Skills:

- Enthusiastic, self-motivated, flexible with strong inter-personal skills
- High degree of initiative
- Willingness and ability to contribute to process improvement initiatives
- Proficient in English, good communication skills, oral and written
- Able to work and communicate at a detailed or high level
- Excellent presentation skills and ability to think on your feet
- Flexibility and willingness to work with staff across the globel


Competencies/Skill sets for this job

Io Design Cmos Ddr Signal Integrity Verification Simulators

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