To work on development of embedded memory compilers ( SRAM, ROM, RF) in advanced nodes.
Architecture exploration and choosing one based on PPA requirements.
Schematic design and simulations
Critical path modeling and optimization
Interface with layout team to define the floor plan and layout guidelines for schematics. layout review to get optimum design.
Interface with char team to define measurement points needed for timing data generation.
Running robustness checks on the compiler.
Experience/Skills required :
5+ years of experience in design of embedded memory compilers
Understanding of memory architectures and the tradeoffs involved.
Sound fundamentals in CMOS basics and custom CMOS Circuit design
Good understanding of bitcell operation and different assist techniques required in advanced nodes.
Familiar with complete memory design ie architecture definition, circuit design, physical design, timing char and design kit development
Familiarity with EDA tools like cadence Virtuoso, spice simulators .
Knowledge of scripting language like Perl etc
B.E. / B.Tech / M.E. / M.Tech