(1) Product validation experience in EDA domain
(2) Good knowledge of design verification processes
(3) Good command on HDL and HVL languages including c/c++/systemc
(4) Experience in process automation using standard scripting languages like perl/python and regression management.
(5) Comodeling and cosimulation experience is a big plus. Modeling done using C/C++/SystemC is desirable.
(6) Having subsystem/SOC verification is plus for the job
(7) Emulation process knowledge is big plus
Candidate we are looking should be in the experience range of 10-15 years