Job Description :
Qualification : BE/B.Tech/ME/M.Tech/MS
Experience : 5- 12 Years
Designation : Physical Design Engineer
Minimum 5 + years of experience in Physical Design.
Netlist to GDSII flow Implementation
Floor Planning, Power Planning, Place & Route, Clock Tree Synthesis (CTS)
Physical Verification (DRC / LVS) using Assura, Calibre & Hercules
Post layout analysis ( IR Drop, SI, Cross talk)
Expertise in EDA tools Cadence SoC Encounter, Synopsys ICC, Magma Blast
Fusion / Talus
Tapeout experience on 90nm/65nm / 45nm Designs
Block Level / Full chip design implementation for medium to fairly large designs.
Email your CV to firstname.lastname@example.org