Lead/ Manager - Memory Design/characterization

Allegro Solutions
  • Bangalore, Delhi
  • Confidential
  • 10-20 years
  • 07 Oct 2015

  • Project/ Program Management IT

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor, IT/ Technology - Embedded
Job Description

- Memory design and development, analysis memory marginality

- Memory characterization, Physical verification, FE verification, release procedure and QA flow of the memory compilers.

- Ensure high quality and timely delivery.

1) Manage, Lead and deliver on complex project requirements

2) Drive multiple projects and provide necessary technical guidance to the engineers

3) Experiment and evaluate new memory architectures and methodologies

4) Be a part of the management team in critical decision making

5) Team building and mentoring

- Understanding of spice-vector writing for memory timing simulations & power-leakage analysis.

- Understanding of memory compiler architectures and basic memory design concepts.

- Good debugging skills.

- Knowledge of scripting in PERL/Shell/TCL scripting etc.

- Proficient with simulation tools like Hspice, Finesim, Hsim, etc. and Synopsys liberty format description.

- Apart from being a strong technical individual should be good multitasker and have the tact of people management in short be a strong techno-managerial person

Qualification: BE/B.Tech/ME/M.Tech

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Allegro Solutions