Senior Design Verification Engineer

CONNECTPRO MANAGEMENT CONSULTANTS PVT LTD
  • Bangalore
  • 10-15 lakh
  • 8-10 years
  • 139 Views
  • 29 May 2015
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  • IT/ Information Technology

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

Design and develop test benches using HVL like SV

- Develop verification environment components using HVL like System Verilog (VMM or UVM) or VERA

- Generate verification and test plans

- Develop test cases, execute and debug the design under test

- As a design engineer should be able to develop design specs, HDL based RTL.

Required knowledge and skills:
- Good Logic and circuit design in Digital electronics, micro processor / controller concepts

- VLSI Design flows

- Expertise in HDLs (Verilog/VHDL)

- Good communication skills

Desirable Skills:
- Familiarity with Scripting languages and a high level programming language


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