Functional Manager- STA

Gobrah Management Consulting Services Pvt.
  • Bangalore
  • Confidential
  • 12-18 years
  • 172 Views
  • 09 Jun 2015
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  • Project/ Program Management IT

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor, IT/ Technology - Embedded
Job Description

Exp on full chip synthesis using Synopsys DC / Cadence RC compiler.
Synopsys Prime Time is Must
Understanding of Verilog/ VHDL RTL constructs
Exposure to DDR2/3, high speed I/O timing Interface or similar is plus
Strong exp on full chip synthesis using Synopsys DC / Cadence RC compiler is must
Should have flair of managing a team of 15-20 engineers & a good team player.
Excellent communication skills
B.Tech/Master's degree in electronics


Competencies/Skill sets for this job

Synopsys Dc Ddr Ddr2 Synthesis Electronics Verilog Rtl Vhdl

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