Engineer - Physical Design

  • Bangalore
  • 10-15 lakh
  • 7-9 years
  • 10 Jul 2015

  • IT/ Information Technology

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

- Place and route along with floor planning, clock expansion, IR drop analysis, physical verification, SI/PI, and design closure tasks of IP and/or SoC meeting all PPAS goals.

- Work with RTL designers and IP owners to understand the design complexity and plan physical design activities of high-gate count radio chip in TIs growing HSP organization.

- Run equivalence checks across gates-to-gates as design progresses.

- Communicate on daily basis with front-end designers and systems engineers to ensure that the developed RTL will meet PPAS goals.

- Work with other physical design teams to share best practices.

- Interact with the software and systems teams to understand the end application/domain.

- Develop expertise in the area of physical design of high speed designs and mentor other engineers in the team.

- Keep up with the advancements in the area of physical design tools and technologies, and incorporate these in future chips.

- Silicon debug.

Projects and Deliverables:

- Work on leading edge Radio SoC to grow TI market share in the wireless infrastructure

- Be part of best is class chip team and work tightly coupled with worldwide firmware/systems team to successfully design products to grow small cell radio solution

- Deliver robust functional silicon.

- SoC/IP design synthesis and related timing closure efforts.

- Plan synthesis strategy to meet high-performance and low power goals

Competencies/Skill sets for this job

Physical Design Projects Timing Closure Place And Route Verification

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