Ddr / dram Specialist - Sr. Design Engineer

Options Executive Search Pvt. Ltd
  • Bangalore
  • 10-15 lakh
  • 5-10 years
  • 27 Mar 2015

  • IT/ Information Technology

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

IP development
Requirement specification, functional specification, implementation specification creation
Micro-architecture of design
RTL implementation and Lint
White box testing
Synthesis, static timing analysis and power analysis
Desired Profile
At least 8 years of hands on industry experience in ASIC/ VHDL and architecture
At least 3 years of hands on industry experience in DRAM(DDR, LP-DDR, Wide-IO) controller IP designis must
Experience designing more than 3 scratch design (more than 300K gate area)
Experience designing more than 200MHz frequency design with considering low power
Experience on ASIC Synthesis flow and static timing flows, Formal checking, etc
Experience of scripting (Tcl, Perl)
Experience in verification language (Specman, System Verilog, System Verilog Assertion) and methodology (eRM, OVM, UVM) is a plus
Filling patent or technical paper is a plus

Competencies/Skill sets for this job

Ddr Verification Rtl Static Timing Analysis Specman Perl Designing

Job Posted By