- Candidate must have transistor level circuit design experience of memories.
- He/She should have worked on 65nm / 45nm / 28nm process technologies and must have Understanding of design issues related to process.
- Candidate is expected to work as individual contributor on memory characterization projects.
- Understanding of memory critical paths and characterization tools.
- Candidate must have done logic verification of memories using verilog or ESPCV.
- Candidate must have significant exposure to validation of the characterized data and undertaken at least few memory compilers or instances.