ASIC/IP Verification Architect

Roland & Associates
  • Bangalore
  • 30-50 lakh
  • 8-16 years
  • 251 Views
  • 31 Dec 2015
dfdf

  • IT/ Information Technology

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description


Position : ASIC/IP Verification Architect
Job Location : Bangalore
Skills Required : ASIC/IP Verification ,System Verilog, UVM

Job Description :

8 to 14 years of experience in verifying complex designs and creating verification IP
Experience in architecting re usable UVM verification environments and components
Expertise in UVM and SystemVerilog
BE/B.tech [Electronics, VLSI] or M.E/M.tech[Electronics, VLSI] (Preferably from NIT/IIT/IISc/BITS)

If interested, please mail your updated profile to kalpana@roljobs.com


Competencies/Skill sets for this job

Asic Verification System Verilog Uvm Ip Verification

Job Posted By

About Organisation

Roland & Associates