ASIC/IP Verification Architect Job opportunity @ Bangalore

Roland & Associates
  • Bangalore
  • 20-45 lakh
  • 8-15 years
  • 15 May 2015

  • IT/ Information Technology

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

Position : ASIC/IP Verification Architect
Job Location : Bangalore
Skills Required : ASIC/IP Verification ,System Verilog, UVM

Job Description :

8 to 14 years of experience in verifying complex designs and creating verification IP
Experience in architecting re usable UVM verification environments and components
Expertise in UVM and SystemVerilog
BE/ [Electronics, VLSI] or M.E/[Electronics, VLSI] (Preferably from NIT/IIT/IISc/BITS)

If interested, please mail your updated profile to

Competencies/Skill sets for this job

Asic Verification Systemverilog Uvm

Job Posted By

About Organisation

Roland & Associates