Physical Design Methodology Engineer (Principal Engineer)
Requirements/Qualifications (Education) : Masters, Bachelors or Ph.D. in Electrical / Electronics Engineering
12+ years of relevant experience
Strong expertise in physical design, timing analysis, physical verification and low-power aspects
Experienced in Synopsys tools like ICC, PT, ICV, StarRC
Familiar with UPF and related flows with Synopsys tools
Strong understanding of physical design challenges and approaches to solve them in very large and complex VLSI designs
Strong problem solving skills and an ability to think outside of the box
Effective communication skills (written and oral)
Able to work across geographies and time-zones
External Job Description : As a Physical Design Methodology Engineer Principal, your responsibilities include the following:
Develop methodologies for accurate and competitive physical implementaion and verification.
Technically lead a group of PD meth engineers in developing solutions to the most challenging problems of physical design and verification
Work with 3rd party EDA vendors for continued improvements in the areas of physical implementation, low-power analsysis, timing closure, and physical verification
You will work in tandem, very closely, with your peers in design closure methodology group based in North America. As you will be helping worldwide teams, you will be expected to make personal adjustments with your everyday work schedule, on a regular basis, to interact with engineers from world-wide design teams.