Senior Engineer DFT Implementation

Bee5 Manpower Consulting
  • Bangalore, Pune
  • 10-18 lakh
  • 4-9 years
  • Views
  • 28 Mar 2017

  • IT/ Information Technology

  • Electrical/ Electronics
Job Description

DFT engineer with excellent analyzing skills.
Hands-on with Scan insertion, ATPG Pattern Simulation with and/ or without timing annotation and debugging simulation mismatches/ Cadence Incisive.
Expertise in WGL/TDL file formats.
Previous experience and competencies in Scan compression techniques and Logic BIST.
Exposure to Memory BIST insertion tools; preferably LogicVision MBIST.
High competencies Boundary Scan, JTAG concepts, Core testing using P1500.
Should have basic understanding of Tester requirements.
Should be good at doing synthesis and timing comprising of RC and PT/Tempus.
Perform formal verification using LEC.
Exposure to SoC level DFT will be a plus.
Experience on low power DFT is an added advantage.
Expertise as DFT engineer with excellent analyzing skills, Scan insertion, ATPG Pattern Simulation with and/ or without timing annotation and debugging simulation mismatches/ Cadence Incisive.
Hands-on with WGL/TDL file formats and revious experience/ competencies in Scan compression techniques and Logic BIST.
Sound knowledge and exposure to Memory BIST insertion tools; preferably LogicVision MBIST.
Highly competent in Boundary Scan, JTAG concepts, Core testing using P1500.
Should have basic understanding of Tester requirements.
Should be good at doing synthesis and timing comprising of RC and PT/Tempus.
Ability to perform formal verification using LEC and exposure to SoC level DFT will be a plus.
Experience on low power DFT is an added advantage.


Competencies/Skill sets for this job

Logicvision Jtag Logic Bist Debugging Pattern Simulation

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About Organisation

Bee5 Manpower Consulting