PHY Design/ddr Phy/memory Controller Engineer

Mobiveil Technologies India Private Limited
  • Bangalore, Chennai
  • 10-12 lakh
  • 4-9 years
  • Views
  • 17 Aug 2016

  • Production/ Manufacturing/ Engineering

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

PCS development in PCIe Protocol.
PHY Design in DDRX/ LPDDRX
Experience creating Verilog based designs from Scratch
Experience developing AXI based IPs/ Blocks
Exposure to Fibre channel and Ethernet protocols, PCIe or USB / Interlaken protocol
Experience in RTL coding, Linting CDC/Synthesis check experience
Sound debugging skills


Competencies/Skill sets for this job

Usb Ips Memory Controller Protocols Verilog

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