Design Engineer - STA Synthesis

Sankalp Semiconductor Pvt. Ltd.
  • Bangalore
  • Confidential
  • 4-9 years
  • Views
  • 27 Oct 2016

  • IT/ Information Technology

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description


Block/Top level RTL synthesis
Logical Synthesis including scan insertion and constraint development.
Block level and top level timing closure
Automation of flows using perl/tcl
Working on STA concepts like derates, margins , sta corner


Desired Candidate Profile

Experience on Block/Top level RTL synthesis for a minimum of 3-4 projects with a good understanding of clocks in the design and related relationships
Good understanding of logical Synthesis concepts including scan insertion and constraint development.
Experience on Block level and top level timing closure for a minimum of 2-3 projects and experience on automation of flows using perl/tcl
Good understanding and experience on STA concepts like derates,margins , sta corners.
Experience on the functional equivalency check for the design and should have the knowledge on the best debugging practices in LEC


Competencies/Skill sets for this job

Timing Closure STA Design Engineer

Job Posted By

About Organisation

Sankalp Semiconductor Pvt. Ltd.