Minimum requirement: Bachelors degree with 3+ years of relevant experience
Design & develop analog/mixed signal CMOS circuits in deep sub-micron technologies (65nm 10nm) in one or more of the following:
A/D, D/A converters
PLL & DLL circuits
High speed Serdes Interfaces (1Gbps-30Gbps)
High speed Memory interfaces (DDR3/4, LPDDR3/4, HMC, HBM)
I/O cell designs: LVTTL/LVCMOS, LVDS, HSTL, SSTL, ESD protection cellse
Analog building blocks: Voltage regulators, Bandgap generators, Temp sensors, high speed amplifiers & comparators.
Create Verilog/verilog-A behavioral models
Perform cell characterization & create cell level timing (.LIB) models.
Create test benches, simulate, run, verify, & analyze spice & mixed modes sims
Supervise &guide layout work
Perform post-layout verification, EM/IR analysis, reliability checks
Create block level & macro level specs and verify
Participate in silicon bring up, characterization, & perform Si correlations against models & simulations