Excellent background in the architecture and Micro-architecture of wireless baseband
Defined and implemented complete transceiver and the corresponding clocking, memory architecture, debug architecture for RF and Analog.
Implementation of filtering and decoding structures in RTL.
Performed tradeoff analysis on implementation options.
Good understanding of Digital Signal Processing and Communications theory.
Ability to analyze independently the impact of any architecture and propose options for implementation.
Interfaced with System group to analyze and propose architectures for signal processing blocks and tradeoffs in implementation vs performance impact.
Experience with implementation of test structures for the Analog to Digital converters and interface to digital I/O
9+ years of experience in digital PHY implementation.
BE/M.Tech in Electronics Engineering.
Emphasis on signal processing / communications would be a plus.
Exp with any of the following Skills
LDPC decoder design
Viterbi decoder design
Synchronization design for OFDM receivers
802.11 PHY digital design
DSL PHY digital design