Staff Design Lead for the WPG Silicon Development team in Bangalore. The candidate will effectively lead and coordinate both pre-silicon design and verification activities as well as post-silicon validation activities on future 32-bit microcontroller based 802.11n Wifi products.
A broad range of experience and skills will be required to lead our small but fast growing team. Job responsibilities include leading our experienced engineering team in the cross-discipline design and testing of audio and Wifi related functional blocks. Members of the team will then integrate these IP into new silicon products. The ability to coordinate pre-silicon and post-silicon tasks under direct supervision and across multiple sites is essential. Managing, mentoring, and technically leading our first level engineering managers and individual contributors will result in the continued success and future growth of the team.
9+ years in SOC design or a combination of SOC design with a verification and/or validation background.
4+ years leading SOC Design Teams to silicon success.
Technically lead the WPG SOC team in our Whitefield, Bangalore, location.
Work closely with our parent site to effectively collaborate on design and verification activities.
Assist in developing core technical and leadership skills within the team.
Performance management of direct reports.
Review our existing processes, recommend improvements, and drive updates.
Evaluate new EDA tools/techniques to keep up with process shifts and improve teams overall efficiency.
Excellent verbal communication, written communication, and presentation skills.
Willingness to travel to our sister sites in the US for key strategic meetings and to coordinate silicon bring up.
Well organized, methodical, and detail oriented.
Proven leadership skills.
BSEE/BSCE minimum, MSEE/MSCE preferred from an accredited engineering school.
Experience with Wifi or Bluetooth a strong plus.
Experience with Python/Perl or other scripting language a plus.
Experience with Jira/Confluence a plus.
Experience with MIPS architecture a plus.