Senior/ Lead Engineer - Physical Design

Sasken Communication Technologies Ltd
  • Bangalore, Pune
  • Confidential
  • 4-9 years
  • 13 Mar 2015

  • Project/ Program Management IT

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

Mandatory Skills :

Synthesis ,LEC,Place and Route(PnR),CTS,Floor Planning, Timing closure, Power Planning,IO planning Core timing , IO Timing closure, Constraints development
Should be comfortable with both implementation and signoff tools

Desired Skills :

MAGMA,ICC, Primetime ,PTSI,Design Compiler,Apache,Calibre
Should be able to handle some full chip level activities. Block (Medium complexity) level PD engineer
Have lead at least 3 tape outs in complete flow of Physical Design.
Should have worked with ARM processor at SoC level.

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