DFT ( Mbist, Atpg,iddq, IO Testing, Mixed-signal IP Testing, Analog IP

Talent HR Solutions
  • Bangalore
  • 10-15 lakh
  • 3-8 years
  • 23 Mar 2015

  • IT/ Information Technology

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

Digital/mixed-signal optimal DFT architecture definition rationalizing across test time/cost, coverage, dppm and customer quality, Plan DFT activities for self and the team
DFT logic integration and verification, Achieve coverage metrics, DFT automation
Looking for suitable hands-on engineers with 3+ years of experience in SOC/IP/Sub-System DFT. Scan/ATPG, Scan synthesis, coverage metrics by fault-models - stuck-at, delay & Bridging,
Memory BIST, Test Mode STA, Test power estimation, Boundary Scan,

Competencies/Skill sets for this job

Dft Atpg Ip Testing Quality Customer Quality Architecture Definition

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