Candidates must have a Bachelor's Degree or higher in Electronics and Communication/ VLSI/ Microelectronics with very good academics.
Masters degree preferred.
5+ years of experience in ASIC Design.
Participation in at least 1 full ASIC cycle as a designer from Arch to Bringup
Good knowledge and experience in RTL/ Synthesis based ASIC design methodology and tools
Good in logic design skills (micro-architecture development and implementation).
Networking and packet based protocol experience is desired
Experience in SONET, OTN or ethernet based technology is preferred
Must have good communication skills.
Must have ability and desire to work as a team.